Radio frequency (RF) power amplifiers are often used in wireless devices, such as cellular telephones. Extending the battery life is a key concern for users and manufacturers of these wireless devices. One of the key factors in determining the battery life of a wireless device is the power consumption of the RF power amplifiers. The RF power amplifiers are designed to operate into an optimal load impedance and are typically coupled to an antenna of the wireless device.
However, under a load mismatch condition, such as, for example, when the antenna of the wireless device approaches objects (e.g., metal structures, human contact, or a hand in the near field of the antenna, or the like), the load impedance of the RF power amplifier changes and the RF power amplifier draws excess current. In some cases, the current can exceed more than two times the current drawn under an optimal load impedance. When the RF power amplifier draws excess current, the battery life of the wireless device is reduced. In addition, the adjacent channel power ratio (ACPR) and error vector magnitude (EVM) linearity limits are often exceeded when the RF power amplifier draws excess current. This reduction in battery life and exceeding of the ACPR and EVM limits are undesirable.
FIG. 1 illustrates a schematic diagram of a detection circuit 100 according to the prior art. Detection circuit 100 includes RF amplifier stages A1-A3, a voltage detection VDET signal, an external bias control signal, an RFIN signal, an RFOUT signal, an output coupler 102, a diode D1, and a collector voltage VCC. Output coupler 102 senses the forward output power from RF amplifier stages A1-A3 (i.e., RFOUT signal), which is rectified by diode D1 to provide a voltage detection VDET signal. The voltage detection VDET signal is applied to an external power control device to adjust the external bias control ExtBIAS signal until the detected output voltage from output coupler 102 equalizes with the power control signal voltage of the external power control device, thereby substantially maintaining a constant forward output power from RF amplifier stages A1-A3.
However, the use of detection circuit 100 is disadvantageous, because the external power control device does not provide a mechanism to limit the amount of current that is drawn by RF amplifier stages A1-A3. For example, under certain load mismatch conditions, the external power control device will continue to draw as much current as is necessary in order to maintain the forward output power of RF amplifier stages A1-A3 constant with the external power control device. Among other things, this reduces the efficiency of RF amplifier stages A1-A3 and decreases the battery life of the wireless device, which, as described above, is disadvantageous for users and manufacturers of these wireless devices.
FIG. 2 illustrates a schematic diagram of another detection circuit 200 according to the prior art. Detection circuit 200 includes RF amplifier stages A1-A3, voltage detection VDET signal, an external collector voltage VCC control signal, RFIN signal, RF out signal, output coupler 102, diode D1, and a bias voltage VBIAS signal. Detection circuit 200 is similar to detection circuit 100, except that instead of using an external power control device to adjust the bias current of RF amplifier stages A1-A3, detection circuit 200 uses the external power control device to adjust the collector voltage VCC of RF amplifier stages A1-A3.
However, the use of detection circuit 200 is disadvantageous, for the same reasons as discussed above with respect to detection circuit 100. In addition, implementation of a hard current limit with detection circuits 100 and 200 is not desirable, as it may adversely affect the RF characteristics of RF amplifier stages A1-A3. For example, as the output power of RF amplifier stages A1-A3 is ramping to a specified value, as defined by the external power control device, a sharp discontinuity may occur when the supply current reaches a predetermined maximum limiting value. This sharp discontinuity is commonly referred to as a hard limit and causes various spurious emissions and unwanted harmonics in the frequency domain. These spurious emissions and unwanted harmonics are undesirable.